TSMC (Taiwan semiconductor) has a major multi-year plan to create rectangular substrate (510 millimeters by 515 millimeters) with over triple the usable area of current round wafers. The rectangular shape means there would also be less unused area left over at the edges. this means less waste because of the rectangular shape and lower costs and higher volume by tripling the size.
The idea behind the new approach is to use rectangular panel-like substrates, rather than the conventional round wafers used today, allowing more sets of chips to be placed on each wafer.
The study is still in its early stages, but it represents a significant technical shift by TSMC, which previously viewed the use of rectangular substrates as too challenging. To make the new method work, TSMC and its suppliers would have to devote a significant amount of time and effort to development as well as upgrade or replace numerous production tools and materials.
TSMC’s advanced chip stacking and assembly techniques — used to produce AI chips for Nvidia, AMD, Amazon and Google — employ 12-inch silicon wafers, the largest available. The chipmaker is expanding its advanced chip packaging capacity in Taiwan to keep up with runaway demand. The expansion in Taichung is mainly for Nvidia, sources briefed on the matter said, while its Tainan expansion is for Amazon and Amazon’s chip design partner Alchip.
For AI computing chips like Nvidia’s H200 and B200, using state-of-the-art chip production alone is not enough. Advanced chip packaging technology called CoWoS, chip-on-wafer-on-substrate pioneered by TSMC, is also necessary. For B200 chipsets, for example, CoWoS makes it possible to combine two Blackwell graphic processing units and connect them with eight high bandwidth memories (HBMs), enabling fast data throughput and accelerated computing performance.
But as chip size grows to accommodate more transistors and to integrate more memory, the current industry standard — 12-inch wafers with an area of approximately 70,685 sq. millimeters — may not be efficient enough for packaging cutting-edge chips in a couple of years.
For example, only 16 sets of the B200 can be built on a single wafer, and that is assuming the production yield is 100%, according to chip industry executives. About 29 sets of the earlier H200 and H100 chips can be packaged on one wafer, according to an estimate by Morgan Stanley.
“The trend is certain. The size of the package will only grow bigger [as chipmakers] squeeze more computing power out of chips used for AI data center computing,” one chip executive told Nikkei Asia. “But this is still at an early stage. For example, the coating of photoresists in cutting-edge chip packaging on a new shape of substrate is one of the bottlenecks. It takes the deep pockets of chipmakers like TSMC to push equipment makers to change equipment designs.”
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Why? 450mm circular wafer research has already been done.
The cost of (Extreme Ultra Violet) EUV and 450mm was too much together, and going 450mm was seen not worth the expense without EUV. So the fabs all stayed at 300mm.
EUV is finally done. Wafers are produced circular, then chips are patterned, then cut out.
Cutting BEFORE patterning the chips is… OK, I guess.
The only reason I can see TSMC not wanting to go 450mm circular is they want their own proprietary wafer tech.
Hey, one way current technology can be “redirected” to do rather cool stuff is 3D holography. Say a room, is outfitted with projectors designed to project a 3D image with in it. Today, the best one can hope for (today) is a fuzzy image that “goes away” when you look at it at some “wrong” angle. Understand this: We have extreme HD resolution video recorders/projectors.
Why not use that to project a 2D (TV like) super-crisp TV image to everyone, where ever they are, in that room? Or perhaps one large image, that floats in front of “everyone”, where ever they are in “that room”, (Oh, that last idea sounds like a real pain in the ass. I can visualize people running/screaming from a room to get away from “the video from hell”. Whatever that video is. Oh, that is creepy… )
Like any technology, people have to “feel good” using it. This is incredibly important. Some very interesting technology crashed and burned because using it made people “feel weird”. This is never a good sign.
This would be a very practical way of giving anyone who needs one a computer screen. (And access to a computer). Without having to buy more computers. Of course, the more screens, each will have slightly lower resolution. But not at a level any human could notice. My late cat had the vision sensitivity to notice. But when he was sitting on my shoulder when I was typing on the net, or watching TV, if he saw something I did not, I don’t recall him saying anything.
That’s due to my ignorance, not his. God knows what he thought… Don’t laugh. We now know dolphin, whale and bat eco-location (sonar) is encrypted language. We know their saying something. We just have no clue what that is (as far as I know). If we ever want to talk to “ET”? Understanding what the animals around us are saying, would be a great place to start…
One way in the past we’ve dealt with the limitations of say the speed of integrated circuits, was to cheat (Or as I prefer to say, “tweak” them). Such as organizing information (not the same as data by the way), as a fractal image, as opposed to individual electron “burps”. It’s amazing what you can do with current technology. You just have to imagine how to use it in a new way. This is when things go from “interesting” to “WOW!, THAT’S SO COOL!” (Trust me on this kids…)
And we’re not even (yet) talking about incorporating biological systems into our technology. That’s when thing’s go from very cool, to mind blowing. (And oh yes, I LOVE IT!)
One way in the past we’ve dealt with the limitations of say the speed of integrated circuits, was to cheat (Or as I prefer to say, “tweak” them). Such as organizing information (not the same as data by the way), as a fractal image, as opposed to individual electron “burps”. It’s amazing what you can do with current technology. You just have to imagine how to use it in a new way. This is when things go from “interesting” to “WOW!, THAT’S SO COOL!” (Trust me on this kids…)
And we’re not even (yet) talking about incorporating biological systems into our technology. That’s when thing’s go from very cool, to mind blowing. (And oh yes, I LOVE IT!)
There was talk about a 450 mm circular wafer some years ago, but it was deemed too expensive to switch to this new format so the industry stuck to 300 mm wafer. And now TSMC is evaluating a square wafer, even larger than the discarded format. I predict that this is many, many, many years down the pipeline.
Just imagine getting ASML to change their stepper machines to this format, when it is already a decade long development cycle to improve the resolution. Adding a new movable stage is probably not in the cards..
I worked at a company making semiconductor manufacturing equipment. We built 450mm equipment. The problem with the equipment t was the size of the vacuum chamber parts The air is pushing on the walls of the vacuum chamber at 14 pounds per square inch. The ceramic window on top of the chamber which required 2 people to lift could no longer be lifted.
With 450mm a number of parts got so heavy that a hoist had to be installed above the equipment. Spare parts could not be stored of shelves in a ware house. Meaning everything more storage space, more time and more handling issues and more cost. Even the operators had problems handling the hard plastic enclosure full of 450mm wafter. Once the customers saw this they quickly decided to stick with 300mm wafers.
I think they will find 500mmm square wafers just as impractical as 450mm. For many memory chips today they stack the electronics. They make a layer of memory. Deposit more silicon on top and then an another layer of memory. And then repeat as necessary to get enough surface area for all the transistors needed while still keeping the memory chips small.
Of course, these days the wafers are handled by robots, right? So it might be slightly easier than before. A robot is not limited by arm strength and can transport (pretty much) any wafer size.
If would be great if they could increase the wafer size to 500 mm x 500 mm, since that would also increase maximum size of the Cerebras processor. Add 3D (like in flash memory production) SRAM and we would have a tremendously powerful system.
Modular construction replaced monolithic dinosaur chips long ago.
Yes and no. AMD is having great success with their chiplets, but Cerebras is going the other way making their “chip” the size of the entire wafer. Or at least the size of the biggest square that can fit within the wafer boundaries.